Prof. Dr.-Ing. Dietmar Fey

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Investigating SAMV Regarding its Suitability For FPGAs (2022) Giahi F, Rachuj S, Fey D Conference contribution A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification (2022) Reiser D, Reichel P, Pechmann S, Mallah M, Oppelt MP, Hagelauer A, Breiling M, et al. Journal article EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis (2022) Schwenger L, Holzinger P, Fey D, Hernandez HGM, Reichenbach M Conference contribution Fault Tolerance in Heterogeneous Automotive Real-time Systems (2022) Lex J, Margull U, Fey D, Mader R Conference contribution Adaptation Strategies for Personalized Gait Neuroprosthetics (2021) Koelewijn A, Audu M, del Ama AJ, Colucci A, Font-Llagunes JM, Gogeascoechea A, Hnat SK, et al. Journal article TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms (2021) Hosseinzadeh S, Biglari M, Fey D Journal article A Case for Function-As-A-Service with Disaggregated FPGAs (2021) Ringlein B, Abel F, Diamantopoulos D, Weiss B, Hagleitner C, Reichenbach M, Fey D Conference contribution Carry-free Addition in Resistive RAM Array: n-bit Addition in 22 Memory Cycles (2021) Prabahar JR, Fey D Conference contribution RISC-V3: A RISC-V Compatible CPU with a Data Path Based on Redundant Number Systems (2021) Reichenbach M, Knödtel J, Rachuj S, Fey D Journal article Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmetic (2021) Fey D, Reuben JR, Slesazeck S Conference contribution