Prof. Dr.-Ing. Dietmar Fey

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford-PKU Model (2020) Reuben JR, Biglari M, Fey D Journal article The allscale framework architecture (2020) Jordan H, Gschwandtner P, Thoman P, Zangerl P, Hirsch A, Fahringer T, Heller T, Fey D Journal article Memristoren für zukünftige Rechnersysteme (2020) Fey D, Karl W, Ungerer T Journal article Simulating memristive systems in mixed-signal mode using commercial design tools (2019) Fritscher M, Knödtel J, Reichenbach M, Fey D Conference contribution A Hardware Inference Accelerator for Temporal Convolutional Networks (2019) Ali R, Mallah M, Leyh M, Holzinger P, Breiling M, Reichenbach M, Fey D Conference contribution, Conference Contribution A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM (2019) Reuben JR, Fey D Conference contribution System architecture for network-attached FPGAs in the cloud using partial reconfiguration (2019) Ringlein B, Abel F, Ditter A, Weiss B, Hagleitner C, Fey D Conference contribution Bridging the gap between high-performance, cloud and service-oriented computing (2019) Ditter A, Tielemann M, Fey D Conference contribution Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method (2019) Peschel J, Knödtel J, Pérez E, Reichenbach M, Wenger C, Fey D Conference contribution, Abstract of lecture Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications (2019) Bauer W, Holzinger P, Rachuj S, Häublein K, Reichenbach M, Fey D Conference contribution, Conference Contribution