Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Base Algorithms of Environment Maps and Efficient Occupancy Grid Mapping on Embedded GPUs (2018) Fickenscher J, Hannig F, Teich J, Bouzouraa ME Conference contribution, Conference Contribution Embedded GPUs in Future Automated Cars (2018) Fickenscher J, Hannig F, Bouzouraa ME, Teich J Conference contribution Loop Parallelization Techniques for FPGA Accelerator Synthesis (2018) Reiche O, Özkan MA, Hannig F, Teich J, Schmid M Journal article Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures (2018) Schwarzer T, Weichslgartner A, Glaß M, Wildermann S, Brand P, Teich J Journal article Symbolic Parallelization of Nested Loop Programs (2018) Tanase AP, Hannig F, Teich J Authored book Configuration Tempering of BRAM-based AES Implementations on FPGAs (2018) Ziener D, Pirkl J, Teich J Conference contribution AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs (2018) Echavarria Gutiérrez JA, Wildermann S, Teich J Conference contribution, Original article Integration of FPGAs in Database Management Systems: Challenges and Opportunities (2018) Becher A, Beena Gopalakrishnan Nair L, Broneske D, Drewes T, Gurumurthy B, Meyer-Wegener K, Pionteck T, et al. Journal article A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs (2018) Weichslgartner A, Wildermann S, Gangadharan D, Glaß M, Teich J Journal article Dynamic Resource Management for Heterogeneous Many-Cores (2018) Henkel J, Teich J, Wildermann S, Amrouch H Conference contribution