PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach (2014) Hannig F, Lari V, Boppu S, Tanase AP, Reiche O Journal article High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model (2014) Schmid M, Hannig F, Tanase AP, Teich J Book chapter / Article in edited volumes Compact Code Generation for Tightly-Coupled Processor Arrays (2014) Boppu S, Hannig F, Teich J Journal article Symbolic Parallelization of Loop Programs for Massively Parallel Processor Arrays (2013) Teich J, Tanase AP, Hannig F Conference contribution Accuracy and Performance Analysis of Harris Corner Computation on Tightly-Coupled Processor Arrays (2013) Sousa É, Tanase AP, Hannig F, Teich J Conference contribution Transactor-based Prototyping of Heterogeneous Multiprocessor System-On-Chip Architectures (2013) Boppu S, Lari V, Hannig F, Teich J Conference contribution Real-Time Range Image Preprocessing on FPGAs (2013) Schmid M, Blocherer M, Hannig F, Teich J Conference contribution Acceleration of Optical Flow Computations on Tightly-Coupled Processor Arrays (2013) Sousa É, Tanase AP, Lari V, Hannig F, Teich J, Paul J, Stechele W, et al. Conference contribution System Integration of Tightly-Coupled Processor Arrays using Reconfigurable Buffer Structures (2013) Hannig F, Schmid M, Lari V, Boppu S, Teich J Conference contribution Loop Program Mapping and Compact Code Generation for Programmable Hardware Accelerators (2013) Boppu S, Hannig F, Teich J Conference contribution