PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays -- Architectural Parameters and Methodology (2006) Hannig F, Dutta H, Teich J Journal article A Generic Framework for Rapid Prototyping of System-on-Chip Designs (2006) Kissler D, Kupriyanov O, Hannig F, Koch D, Teich J Conference contribution An Architecture Description Language for Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Schaffer R, Merker R Conference contribution Modeling of Interconnection Networks in Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Lallet J, Sentieys O, Pillement S Other publication type Using symbolic feasibility tests during design space exploration of heterogeneous multi-processor systems (2005) Schlichter T, Hannig F, Haubelt C, Teich J Conference contribution, Conference Contribution Automatic FIR Filter Generation for FPGAs (2005) Dutta H, Hannig F, Teich J Conference contribution Defragmenting the Module Layout of a Partially Reconfigurable Device (2005) Ahmadinia A, Bobda C, Fekete SP, Hannig F, Majer M, Teich J, Van Der Veen JC Conference contribution Control Path Generation for Mapping Partitioned Dataflow-dominant Algorithms onto Array Architectures (2005) Dutta H, Hannig F, Teich J Other publication type Output Serialization for FPGA-based and Coarse-grained Processor Arrays (2005) Hannig F, Teich J Conference contribution Co-Design of Massively Parallel Embedded Processor Architectures (2005) Dutta H, Hannig F, Kupriyanov O, Teich J, Schaffer R, Siegel S, Merker R, et al. Conference contribution