Third Party Funds Group - Sub project
Acronym: KAIROS
Start date : 01.08.2011
End date : 31.10.2014
Project KAIROS aims at high integration of the control and power electronics in automotive power modules by using innovative ceramic materials for improved cooling and mechanical layout. This smart power module comprises power semiconductors (e.g., IGBT, SiC JFET) and the novel ASIC driver set. These ASIC enable controlling the charging and discharging of the gate of the power transistor, according to the operating point of the power module and are designed in a high temperature CMOS process. By using these ASIC, the functional integration density can be increased and the number and size of passive components on the low temperature co-fired ceramic (LTCC) control board can be minimized. This increases the reliability at high system temperatures.
Power converters like DC/DC and DC/AC converters are using MOSFET or IGBT power semiconductor switches. To increase the power density by reducing the size of the passive devices like capacitors, inductors and transformers, a demand for increasing the switching frequency of the power semiconductor switches exists. During this project, a galvanically isolated gate-driver integrated circuit was realized as an ASIC chipset providing a flexible control of the switching speed of the driven power switches (i.e., IGBT or MOSFET).
The basic idea behind the proposed concept is to use a buck-boost stage for controlling the charging and discharging of the gate of the power transistor. To provide an accurate control of the output current and output voltage slopes of the power transistor, a precise charging and discharging of its gate capacity is required during its switching period, thus necessitating an impulse train (i.e., burst) in the Megahertz frequency range. This ASIC was designed in a 0.35µm high-temperature automotive qualified CMOS technology and integrates the time critical and driving-strength dependent analog and mixed-signal parts of the gate-driver circuit. Furthermore, it reduces the switching losses occurring in the gate of the used power devices by using a regenerative switching circuitry. Thanks to these functions, the generated electromagnetic interferences are much better controlled over all the load range in modern power converters using half-bridge or full-bridge topologies in combination with hard switching. The ASIC was assembled in a molded 44pin TQFP plastic package and the maximum switching frequency of the gate-driver when driving a capacitive load with 15V switching voltage was measured to be 25MHz at a 50% duty cycle. By using a complex programmable logic device for generating the pulse sequences in dependence of the load current and providing also the switching sequences for regenerative switching, a large range of power applications can potentially benefit from the developed gate-driver circuit.
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