Vertical Ge heterojunction gate-ail-around tunneling field effect transistors with Ge0.92Sn0.08-δ-Layers at the tunneling junction

Schulze J, Blech A, Fischer IA, Hähnel D, Naasz S, Tropper EM (2014)

Publication Type: Conference contribution

Publication year: 2014

Publisher: IEEE Computer Society

Pages Range: 165-166

Conference Proceedings Title: 2014 7th International Silicon-Germanium Technology and Device Meeting, ISTDM 2014

Event location: SGP

ISBN: 9781479954285

DOI: 10.1109/ISTDM.2014.6874652

Abstract

We presented first results on the fabrication and characterization of vertical Ge heterojunction GAA-TFETs with a Ge0.92Sn 0.08-δ-layer at the tunneling junction with transistor body diameters from 10 μm down to 250 nm (pillar geometry). © 2014 IEEE.

Authors with CRIS profile

Jörg Schulze

Involved external institutions

Universität Stuttgart DE Germany (DE)

How to cite

APA:

Schulze, J., Blech, A., Fischer, I.A., Hähnel, D., Naasz, S., & Tropper, E.M. (2014). Vertical Ge heterojunction gate-ail-around tunneling field effect transistors with Ge0.92Sn0.08-δ-Layers at the tunneling junction. In 2014 7th International Silicon-Germanium Technology and Device Meeting, ISTDM 2014 (pp. 165-166). SGP: IEEE Computer Society.

MLA:

Schulze, Jörg, et al. "Vertical Ge heterojunction gate-ail-around tunneling field effect transistors with Ge0.92Sn0.08-δ-Layers at the tunneling junction." Proceedings of the 7th International Silicon-Germanium Technology and Device Meeting, ISTDM 2014, SGP IEEE Computer Society, 2014. 165-166.

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