A bipolar RRAM selector with designable polarity dependent on-voltage asymmetry

Lashkare S, Karkare P, Bafna P, Raju MV, Srinivasan VS, Lodha S, Ganguly U, Schulze J, Chopra S (2013)

Publication Type: Conference contribution

Publication year: 2013

Pages Range: 178-181

Conference Proceedings Title: 2013 5th IEEE International Memory Workshop, IMW 2013

Event location: USA

ISBN: 9781467361675

DOI: 10.1109/IMW.2013.6582128

Abstract

Bipolar RRAM memory cells show different extents of asymmetry in set/reset voltages. Recently, our group has demonstrated a symmetric Si epitaxy based 4F2 punch-through diode based NPN selector. Here, we demonstrate that a modification of the doping profile of the NPN diode selector produces designable asymmetry in the I-V characteristics. We demonstrate based on a TCAD study that replacing the uniform p region in the symmetric NPN structure by an asymmetric p/p-bi-layer could lead to an asymmetry in the turn-on voltage V on+/Von- by a factor of ∼1/2. Our calculations show that the on-current (few μA at 20nm technology node or >1MA/cm 2) and on-voltage asymmetry control is adequate for various promising bipolar RRAM memory elements from literature. Finally, the on-voltage asymmetry control is experimentally demonstrated based on a low temperature (<700°C) Si epitaxy process; the measured asymmetry in the new experimental devices is about Von+/Von-=1/2.1 compared to the aVon+/Von-=1/1.2 in the symmetric devices. © 2013 IEEE.

Involved external institutions

Indian Institute of Technology Bombay IN India (IN) Universität Stuttgart DE Germany (DE) Applied Materials, Inc. US United States (USA) (US)

How to cite

APA:

Lashkare, S., Karkare, P., Bafna, P., Raju, M.V., Srinivasan, V.S., Lodha, S.,... Chopra, S. (2013). A bipolar RRAM selector with designable polarity dependent on-voltage asymmetry. In 2013 5th IEEE International Memory Workshop, IMW 2013 (pp. 178-181). USA.

MLA:

Lashkare, S., et al. "A bipolar RRAM selector with designable polarity dependent on-voltage asymmetry." Proceedings of the 2013 5th IEEE International Memory Workshop, IMW 2013, USA 2013. 178-181.

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