Endurance-Aware RRAM-Based Reconfigurable Architecture using TCAM Arrays
Cardoso De Lima JP, Brandalero M, Carro L (2020)
Publication Type: Conference contribution
Publication year: 2020
Publisher: Institute of Electrical and Electronics Engineers Inc.
Pages Range: 40-46
Conference Proceedings Title: Proceedings - 30th International Conference on Field-Programmable Logic and Applications, FPL 2020
Event location: Virtual, Gothenburg, SWE
ISBN: 9781728199023
DOI: 10.1109/FPL50879.2020.00018
Abstract
Field-Programmable Gate Arrays (FPGAs) have enabled the acceleration of important applications in the networking, cloud, and artificial intelligence domains, while providing a flexible fabric that can be reprogrammed on demand. Still, the high static power dissipation of FPGAs driven by Static Random Access Memories (SRAMs) leads them to energy consumption levels that may be unacceptable for several application domains. Reconfigurable fabrics with emerging Resistive RAM (RRAM) technologies have been considered as one of the most promising solutions to address these energy issues of current FPGAs. However, the low endurance and the high variability of these emerging devices present a threat to the demands for reconfiguration cycles of current applications, pushing for novel architectures and design strategies techniques for improving the device's lifetime. To address these challenges, we propose a novel reconfigurable architecture targeting classes of applications that require high flexibility in the field. More specifically, we introduce a reconfigurable architecture based on Ternary Content-Addressable Memories (TCAMs) that meets a double mission: to accelerate and tolerate endurance and variation issues supported by a CAD tool that foresees the reuse of data configuration, allowing for an increased endurance in the field. We present the potential of the proposed architecture and its synthesis flow for processing Regular Expression Matching (REM), widely used in network intrusion detection systems. The results show that the performance can achieve up to 32Gbps throughput at 0.89W, while improving the device's lifetime by two orders of magnitude.
Involved external institutions
Universidade Federal do Rio Grande do Sul (UFRGS)
Brazil (BR)
Brandenburgische Technische Universität Cottbus-Senftenberg (BTU)
Germany (DE)
Brazil (BR)
Brandenburgische Technische Universität Cottbus-Senftenberg (BTU)
Germany (DE)
How to cite
APA:
Cardoso De Lima, J.P., Brandalero, M., & Carro, L. (2020). Endurance-Aware RRAM-Based Reconfigurable Architecture using TCAM Arrays. In Nele Mentens, Nele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericas, Ioannis Sourdis (Eds.), Proceedings - 30th International Conference on Field-Programmable Logic and Applications, FPL 2020 (pp. 40-46). Virtual, Gothenburg, SWE: Institute of Electrical and Electronics Engineers Inc..
MLA:
Cardoso De Lima, João Paulo, Marcelo Brandalero, and Luigi Carro. "Endurance-Aware RRAM-Based Reconfigurable Architecture using TCAM Arrays." Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Virtual, Gothenburg, SWE Ed. Nele Mentens, Nele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericas, Ioannis Sourdis, Institute of Electrical and Electronics Engineers Inc., 2020. 40-46.
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